The testing of integrated circuit devices mounted on printed circuit boards (PCBs) has become more difficult as the density of such devices has increased while the size of the printed circuit boards on which the devices are mounted have decreased. Mounting technologies such as surface mount devices have also made the testing of the devices and printed circuit boards containing the devices more difficult. As a result, modern integrated circuit devices typically include internal test circuitry to allow for the testing of the devices mounted on a printed circuit board. More specifically, modern integrated circuit devices typically include test circuitry that complies with the Joint Test Action Group (JTAG) or IEEE 1149.1 standard, allowing printed circuit boards containing the devices and the devices themselves to be more easily tested according to standardized protocols that are part of this widely adopted standard.
The JTAG standard utilizes a boundary scan architecture that enables the JTAG test circuitry to set and read the values of signals on pins of the integrated circuit devices contained on the printed circuit board without having direct physical access to those pins, as will be appreciated by those skilled in the art. The JTAG test circuitry includes an interface that is known as a Test Access Port (TAP) and a TAP controller that operates in response to signals provided on the interface to control instructions and data registers to thereby test core logic circuitry and interconnects of the integrated circuit device containing the JTAG test circuitry. Manufacturers may include customized test circuitry as part of the JTAG test circuitry contained in their integrated circuit devices in order to allow various types of custom testing to be done on the core logic circuitry and interconnects of their devices. When such customized test circuitry is included, however, the JTAG test circuitry must still include certain structure and functionality to comply with the JTAG standard. Thus, in these situations the JTAG test circuitry must comply with the standard while also performing the desired customized testing functionality, which can undesirably complicate the test circuitry and increase the area occupied by the test circuitry on the integrated circuit device.
There is a need for improved JTAG test circuitry that complies with the JTAG standard while also providing desired customized testing functionality.